Integrated PVD system for aluminum hole filling using...

Chemistry: electrical and wave energy – Apparatus – Coating – forming or etching by sputtering

Reexamination Certificate

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C204S298080

Reexamination Certificate

active

06238533

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to semiconductor integrated circuits. In particular, the invention relates to a barrier layer formed between a metal and a semiconductor, and the covering of the barrier layer with a conductor.
BACKGROUND OF THE INVENTION
Modem semiconductor integrated circuits usually involve multiple layers separated by dielectric (insulating) layers, such as of silicon dioxide or silica, often referred to simply as an oxide layer, although other materials are being considered for the dielectric. The layers are electrically interconnected by holes penetrating the intervening oxide layer which contact some underlying conductive feature. After the holes are etched, they are filled with a metal, such as aluminum, to electrically connect the bottom layer with the top layer. The generic structure is referred to as a plug. If the underlying layer is silicon or polysilicon, the plug is a contact. If the underlying layer is a metal, the plug is a via.
Plugs have presented an increasingly difficult problem as integrated circuits are formed with an increasing density of circuit elements because the feature sizes have continued to shrink. The thickness of the oxide layer seems to be constrained to the neighborhood of 1 &mgr;m, while the diameter of the plug is being reduced from the neighborhood of 0.25 &mgr;m or 0.35 &mgr;m to 0.18 &mgr;m and below. As a result, the aspect ratios of the plugs, that is, the ratio of their depth to their minimum lateral dimension, is being pushed to 5:1 and above.
Filling such a hole with a metal presents two major difficulties.
The first difficulty is filling such a hole without forming an included void, at least with a filling process that is fast enough to be economical and at a low enough temperature that doesn't degrade previously formed layers. Any included void decreases the conductivity through the plug and introduces a substantial reliability problem. Chemical vapor deposition (CVD) is well known to be capable of filling such narrow holes with a metal, but CVD is considered to be too slow for a complete filling process. Physical vapor deposition (PVD), alternatively called sputtering, is the preferred filling process because of its fast deposition rates. However, PVD does not inherently conformally coat a deep and narrow hole. A fundamental approach for applying PVD to deep holes is to sputter the metal on a hot substrate so that the deposited material naturally flows into the narrow and deep feature. This process is typically referred to as reflow. However, high-temperature reflow results in a high thermal budget, and in general the thermal budget needs to be minimized for complex integrated circuits. Further, even at high temperatures, the metal does not always easily flow into a very narrow aperture.
The second difficulty is that an aluminum contact is not really compatible with the underlying semiconductive silicon. At moderately high temperatures, such as those required for the reflow of aluminum into the narrow hole, aluminum tends to diffuse into the silicon and to severely degrade its semiconductive characteristics. Accordingly, a diffusion barrier needs to be placed between the aluminum and the underlying silicon.
These problems are well known and have been addressed by Xu et al. in U.S. patent application, Ser. No. 08/628,835, filed Apr. 5, 1996, incorporated herein by reference in its entirety, which is a continuation in part of U.S. patent application, Ser. No. 08/511,825, filed Aug. 7, 1995 now U.S. Pat. No. 5,962,923.
As shown in the cross-sectional view of
FIG. 1
, a contact hole
10
having an aspect ratio defined by its depth
12
and its width
14
is etched through a dielectric layer
16
to an underlying substrate
18
, which in the more difficult situation includes a surface layer of silicon. In the hole filling process, the contact hole
10
is conformally coated with a titanium (Ti) layer
20
, a titanium nitride (TiN) layer
22
, and a graded (TIN
x
) layer
24
, that is, the graded layer
24
begins at its bottom as TiN but its top portion is nearly pure Ti. These three layers form a tri-layer barrier
26
, which provides both the conformality and the adhesion to the underlying layers, as well as sufficient wetting for the after deposited aluminum. A Ti layer
20
, after siliciding at the sufficiently high annealing temperature, forms a good ohmic contact with the underlying silicon substrate
18
. Thereafter, a metal layer
28
is sputter deposited into the hole
10
so as to fill it without voids. That is, the tri-layer barrier
26
sufficiently wets to the after filled aluminum that it readily flows into the hole
10
at a moderate temperature while the tri-layer barrier
26
nonetheless provide a sufficient diffusion barrier between the aluminum
28
and the underlying silicon
18
.
According to Xu et al., the wetting quality of the three layers
20
,
22
,
24
is enhanced by depositing them in a high-density PVD reactor. On the other hand, they recommend that the aluminum layer
28
be sputter deposited in a conventional PVD chamber with a low plasma density. In particular, they recommend that the aluminum layer
28
be deposited as two layers in an improved two-step cold/warm version of a conventional sputtering process. In the first cold step, a seed layer
30
of aluminum is sputter deposited at a substrate temperature below 200° C. so as to conformally coat the underlying barrier tri-layer
26
with a fairly uniform aluminum layer. In the second warm step, a filling layer
32
of aluminum is sputter deposited at higher temperatures so as to reflow and fill the contact hole
10
. An advantage of the tri-layer barrier
26
grown by ionized metal plating (IMP) is that the warm Al filling layer
32
can be filled at temperatures below 400° C., even as low as 350° C. according to the reported data. The warm layer
32
can be deposited at a fairly high rate so as to improve the system throughput. Because the two aluminum layers
30
,
32
differ primarily in their different deposition temperatures, they are likely deposited within a single conventional PVD chamber capable only of developing a low-density plasma. Also, the two deposition can be performed continuously, with the temperature being ramped up during the deposition. As a result, the two Al layers
30
,
32
have no clear boundary between them.
In the context of contact hole filling, a high-density plasma is defined in one sense as one substantially filling the entire volume it is in and having an average ion density of greater than 10
11
cm
−3
in the principal part of the plasma. The conventional plasma-enhanced PVD reactor produces a plasma of significantly lower ion density. Although high-density plasmas are available in a number of different types of reactors, they are preferably obtained in an inductively coupled plasma reactor, such as the type shown in schematical cross section in FIG.
2
. For reasons to be described shortly, this is referred to an ionized metal plasma or plating (IMP) reactor.
As shown in this figure, which is meant only to be schematical, a vacuum chamber
40
is defined principally by a chamber wall
42
and a target backing plate
44
. A PVD target
46
is attached to the target backing plate
44
and has a composition comprising at least part of the material being sputter deposited. For the deposition of both titanium (Ti) and titanium nitride (TiN), the target
46
is made of titanium. A substrate
48
being sputter deposited with a layer of a PVD film is supported on a pedestal electrode
50
in opposition to the target
46
. Processing gas is supplied to the chamber
40
from gas sources
52
,
54
as metered by respective mass flow controllers
56
,
58
, and a vacuum pump system
60
maintains the chamber
40
at the desired low pressure.
An inductive coil
62
is wrapped around the space between the target
46
and the pedestal
50
. Three independent power supplies are used in this type of inductively coupled sputtering chamber. A DC power supply
64
negatively biases

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