Integrated MPEG decoder and image resizer for SLM-based digital

Television – Bandwidth reduction system – Data rate reduction

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Details

348443, 348458, 348845, 348581, 345127, 345154, 345202, H04N 701, H04N 974, H04N 700, G09G 500

Patent

active

061510742

ABSTRACT:
A video processing unit (13) that decodes compressed video data and resizes the image represented by the video data. The video processing unit (13) has two processing engines--a decoding engine (24) and a scaling engine (25), which share a memory (23). A memory manager (22) handles data requests from the two engines, and handles reading and writing of the memory (22).

REFERENCES:
patent: 5822024 (1998-10-01), Setogawa et al.
patent: 5831592 (1998-11-01), Cahill, III
patent: 5832120 (1998-11-01), Prabhakar et al.
patent: 5874937 (1999-02-01), Kesatoshi

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