Integrated memory cell and method of fabrication

Details Integrated memory cell and method of fabrication Integrated memory cell and method of fabrication

2005-09-13

2005-09-13

Thomas, Tom (Department: 2815)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S211000, C438S257000, C438S692000, C257S315000, C257S321000

Reexamination Certificate

active

06943071

ABSTRACT:
A nonvolatile memory cell comprising a pair of spaced apart shallow trench isolation regions formed in a substrate and defining a substrate active region. A tunnel dielectric is formed on the substrate active region. A floating gate is formed on the tunnel dielectric and is self aligned between the spaced apart shallow trench isolation regions. A dielectric layer is formed on the floating gate and a control gate formed on the dielectric layer. A source region and a drain region are formed in the substrate active region on opposite sides of the floating gate.

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