Integrated high-speed bipolar logic circuit method

Details Integrated high-speed bipolar logic circuit method Integrated high-speed bipolar logic circuit method

1994-12-20

1996-06-25

Hudspeth, David R.

Electronic digital logic circuitry

Significant integrated structure, layout, or layout...

326 21, 257575, H03K 19013

Patent

active

055303811

ABSTRACT:
To provide a type of logic circuit, characterized by the fact that the novel-configuration logic circuit can be easily manufactured in a bipolar process, having a high integration degree and allowing a high-speed operation. For standard longitudinal-type NPN transistor TR0, its emitter E0 is connected to bias terminal BIAS, base B0 is connected to voltage source +Vcc, and collector C0 is connected to base B1 of PNP transistor TR1. For lateral-type PNP transistor TR1, emitter E1 is connected to voltage source Vxx, base B1 is connected to both the collector Co of NPN transistor TR0 and input terminal IN, and collectors C1, C2, C3, . . . Cn are connected to output terminals OUT1, OUT2, PUT3, . . . OUTn, respectively. Schottky diodes SBD1, SBD2, SBD3, . . . SBDn are connected between base B1 and collectors C1, C2, C3, . . . Cn of NPN transistor TR1 with a cathode on the side of the base and with an anode on the side of the collector.

REFERENCES:
patent: 4826780 (1989-05-01), Takemoto et al.
patent: 4999518 (1991-03-01), Dhong et al.
patent: 5239212 (1993-08-01), Masuda et al.
patent: 5402016 (1995-03-01), Nakagawa

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