Integrated getter area for wafer level encapsulated...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive

Reexamination Certificate

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C438S051000

Reexamination Certificate

active

07923278

ABSTRACT:
There are many inventions described and illustrated herein. In one aspect, present invention is directed to a thin film encapsulated MEMS, and technique of fabricating or manufacturing a thin film encapsulated MEMS including an integrated getter area and/or an increased chamber volume, which causes little to no increase in overall dimension(s) from the perspective of the mechanical structure and chamber. The integrated getter area is disposed within the chamber and is capable of (i) “capturing” impurities, atoms and/or molecules that are out-gassed from surrounding materials and/or (ii) reducing and/or minimizing the adverse impact of such impurities, atoms and/or molecules (for example, reducing the probability of adding mass to a resonator which would thereby change the resonator's frequency). In this way, the thin film wafer level packaged MEMS of the present invention includes a relatively stable, controlled pressure environment within the chamber to provide, for example, a more stable predetermined, desired and/or selected mechanical damping of the mechanical structure.

REFERENCES:
patent: 4849071 (1989-07-01), Evans et al.
patent: 4945769 (1990-08-01), Sidner et al.
patent: 5025346 (1991-06-01), Tang et al.
patent: 5445991 (1995-08-01), Lee
patent: 5470797 (1995-11-01), Mastrangelo
patent: 5493177 (1996-02-01), Muller et al.
patent: 5616514 (1997-04-01), Muchow et al.
patent: 5683591 (1997-11-01), Offenberg
patent: 5804083 (1998-09-01), Ishii et al.
patent: 5922212 (1999-07-01), Kano et al.
patent: 6028332 (2000-02-01), Kano et al.
patent: 6146917 (2000-11-01), Zhang et al.
patent: 6200882 (2001-03-01), Drake et al.
patent: 6240782 (2001-06-01), Kato et al.
patent: 6318175 (2001-11-01), Muchow et al.
patent: 6352935 (2002-03-01), Collins et al.
patent: 6450029 (2002-09-01), Sakai et al.
patent: 6477901 (2002-11-01), Tadigadapa et al.
patent: 6507082 (2003-01-01), Thomas
patent: 6521508 (2003-02-01), Cheong et al.
patent: 6538312 (2003-03-01), Peterson et al.
patent: 6635509 (2003-10-01), Quellet
patent: 7041225 (2006-05-01), Lutz
patent: 2002/0016058 (2002-02-01), Zhao
patent: 2003/0173330 (2003-09-01), Lutz
patent: 100 17 422 (2001-10-01), None
patent: 100 56 716 (2002-05-01), None
patent: 102 26 028 (2003-12-01), None
patent: WO 01/77008 (2001-10-01), None
patent: WO 01/77009 (2001-10-01), None
patent: WO 03/105198 (2003-12-01), None
John L. Vossen, Thin Film Processes, Academic Press, vol. I, 1978, pp. 309-311.
Partridge, Aaron et al., “New thin film epitaxial polysilicon encapsulation for piezoresistive accelerometers”, Technical Digest, MEMS, IEEE International Conference on Microelectromechanical Systems, Jan. 21, 2001, pp. 54-59.

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