Integrated circuits and methods with two types of decoupling...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S207000, C257S297000, C257S300000, C257SE29345, C257SE27070

Reexamination Certificate

active

07898013

ABSTRACT:
Methods and systems for optimal decoupling capacitance in a dual-voltage power-island architecture. In low-voltage areas of the chip, accumulation capacitors of two different types are used for decoupling, depending on whether the capacitor is located in an area which is always-on or an area which is conditionally powered.

REFERENCES:
patent: 6320278 (2001-11-01), Nishiyama et al.
patent: 6844771 (2005-01-01), Chen
patent: 2003/0193771 (2003-10-01), Liao
patent: 2005/0030057 (2005-02-01), Kim
International Search Report mailed Jun. 25, 2008, for International Application No. PCT/US2007/089216.
Written Opinion of the International Searching Authority mailed on Jun. 25, 2008, for International Application No. PCT/US2007/089216.

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