Integrated circuitry and semiconductor processing method of form

Details Integrated circuitry and semiconductor processing method of form Integrated circuitry and semiconductor processing method of form

1999-08-30

2000-07-25

Smith, Matthew

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

438775, 438288, H01L 2131, H01L 21336

Patent

active

060936614

ABSTRACT:
In accordance with an aspect of the invention, a semiconductor processing method of forming field effect transistors includes forming a first gate dielectric layer over a first area configured for forming p-type field effect transistors and a second area configured for forming n-type field effect transistors, both areas on a semiconductor substrate. The first gate dielectric layer is silicon dioxide having a nitrogen concentration of 0.1% molar to 10.0% molar within the first gate dielectric layer, the nitrogen atoms being higher in concentration within the first gate dielectric layer at one elevational location as compared to another elevational location. The first gate dielectric layer is removed from over the second area while leaving the first gate dielectric layer over the first area, and a second gate dielectric layer is formed over the second area. The second gate dielectric layer is a silicon dioxide material substantially void of nitrogen atoms. Transistor gates are formed over the first and second gate dielectric layers, and then p-type source/drain regions are formed proximate the transistor gates in the first area and n-type source/drain regions are formed proximate the transistor gates in the second area.

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