Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-05-15
2007-05-15
Decady, Albert (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S727000, C714S729000
Reexamination Certificate
active
10373388
ABSTRACT:
Embodiments of the present invention provide an integrated circuit. In one embodiment, the integrated circuit comprises logic blocks and a routing module. The routing module is configured to receive test input vectors, select at least one logic block, select a routing configuration, and route the test input vectors to the at least one selected logic block and provide test output vectors according to the selected routing configuration.
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Avago Technologies General IP (singapore) Pte. Ltd.
De'cady Albert
Trimmings John P
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