Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1997-10-29
2000-07-11
Tu, Trinh L.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
G01R 3128
Patent
active
060888229
ABSTRACT:
There is disclosed an integrated circuit comprising a test access port controller having a first mode of operation in which it is connectable to test logic to effect communication of serial test data and the control of an incoming clock signal, and a second mode of operation in which a data adaptor is connected to input and output pins via the test access port controller, the data adaptor being supplied with parallel data and control signals from on-chip functional circuitry and converting such parallel data and control signals into a sequence of serial bits including flow control bits.
REFERENCES:
patent: 5428624 (1995-06-01), Blair et al.
patent: 5590354 (1996-12-01), Klapproth et al.
patent: 5781558 (1998-07-01), Inglis et al.
Standard Search Report dated Feb. 28, 1997.
Galanthay Theodore E.
Morris James H.
SGS-Thomson Microelectronics Limited
Tu Trinh L.
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