Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2005-04-05
2005-04-05
Lebentritt, Michael S. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Testing
C365S189040, C365S189070, C365S191000
Reexamination Certificate
active
06876591
ABSTRACT:
Testing an integrated circuit IC (2) with an embedded or integrated non-volatile memory (3), in particular an embedded memory, an EPROM or EEPROM, is particularly difficult because mass production and low prices and minimal profit margins require that the testing, which usually requires expensive and large equipment, can be done in a minimum of time. Usually, the testing of an embedded memory (3) is a kind of bottleneck during manufacturing. A test structure and design and an associated test method this test time for an embedded memory. In essence, a few test devices (8,9) integrated into the IC (2), use of the serial port provided on the IC, and an appropriate test design of a built-in self test whereby predetermined regular test patterns are written automatically into the embedded memory and an automated memory readout is compressed on the IC for a serial readout from it, allow a fast test of the embedded memory and thus circumvent the aforementioned bottleneck.
REFERENCES:
patent: 6651202 (2003-11-01), Phan
patent: 6658611 (2003-12-01), Jun
Farkas Georg
Gappisch Steffen
Lebentritt Michael S.
Luu Pho M.
Waxler Aaron
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