Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1991-12-17
1994-03-15
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Differential sensing
36518909, 36523006, G11C 702
Patent
active
052951049
ABSTRACT:
An integrated circuit, such as a memory, having an internal data bus and circuitry for precharging the same is disclosed. Each data conductor in said data bus is associated with a dummy data conductor, which is driven to a complementary logic state from that of its associated data conductor. During precharge and equilibration at the beginning of a cycle, initiated by an address transition detection or by a clock signal, each data conductor is connected to its dummy data conductor so that the data conductor is precharged to a midlevel by way of charge sharing. Also during precharge and equilibration, the data driver is placed in a high impedance state by the sense amplifier output nodes both going to the same logic level. This midlevel precharge allows for faster switching, and reduced instantaneous current, than obtained for rail-to-rail switching. Self-biasing circuits are connected to each of the data conductors and dummy data conductors, to prevent floating conditions during long precharge and equilibration periods. The output stage receiving the data conductor is preferably disabled during precharge and equilibration, so that the data conductor can be precharged near the trip level of the output stage, without risking output stage oscillations. A termination is also provided for the dummy data conductor, matching the load presented by the output stage to the data conductor, so that the data conductor and its dummy data conductor are at complementary states even during transient conditions.
REFERENCES:
patent: 4494219 (1985-01-01), Tanaka et al.
patent: 4620298 (1986-10-01), Ozawa
patent: 4677590 (1987-06-01), Arakawa
patent: 4843595 (1989-06-01), Suzuki
patent: 4922461 (1990-05-01), Hayakawa et al.
patent: 5047984 (1991-09-01), Monden
patent: 5062082 (1991-10-01), Choi
patent: 5068831 (1991-11-01), Hoshi et al.
patent: 5146427 (1992-09-01), Sasaki et al.
Anderson Rodney M.
Dinh Son
Jorgenson Lisa K.
LaRoche Eugene R.
Robinson Richard K.
LandOfFree
Integrated circuit with precharged internal data bus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuit with precharged internal data bus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit with precharged internal data bus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1540455