Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1994-07-18
1998-02-17
Jackson, Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257310, 257311, 257763, 257764, 257768, 365145, H01L 27108
Patent
active
057194165
ABSTRACT:
A method of fabricating a ferroelectric or layered superlattice DRAM compatible with conventional silicon CMOS technology. A MOSFET is formed on a silicon substrate. A thick layer of BPSG followed by a thin SOG layer overlies the MOSFET. A capacitor is formed by depositing a layer of platinum, annealing, depositing an intermediate layer comprising a ferroelectric or layer superlattice material, annealing, depositing a second layer of platinum, then patterning the capacitor. Another SOG layer is deposited, contact holes to the MOSFET and capacitor are partially opened, the SOG is annealed, the contact holes are completely opened, and a Pt/Ti/PtSi wiring layer is deposited.
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Hiraide Shuzo
McMillan Larry D.
Mihara Takashi
Paz De Araujo Carlos A.
Watanabe Hitoshi
Guay John
Jackson Jerome
Olympus Optical Co,. Ltd.
Symetrix Corporation
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