Integrated circuit package system with downset lead

Details Integrated circuit package system with downset lead Integrated circuit package system with downset lead

2006-05-04

2008-10-28

Andújar, Leonardo (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S673000

Reexamination Certificate

active

07443015

ABSTRACT:
An integrated circuit package system includes an integrated circuit package having a downset terminal lead, a planar recessed lead surface of the downset terminal lead, and an attached integrated circuit over the planar recessed lead surface.

REFERENCES:
patent: 6018189 (2000-01-01), Mizuno
patent: 6580165 (2003-06-01), Singh
patent: 6677662 (2004-01-01), Chung et al.
patent: 6700187 (2004-03-01), Paek
patent: 6750546 (2004-06-01), Villanueva et al.
patent: 6798667 (2004-09-01), Chan
patent: 6864423 (2005-03-01), Tan et al.
patent: 6890793 (2005-05-01), Singh
patent: 7042068 (2006-05-01), Ahn et al.
patent: 2002/0020907 (2002-02-01), Seo et al.
patent: 2005/0139972 (2005-06-01), Chiu et al.
patent: 2005/0258521 (2005-11-01), Park et al.

Affiliated with

Also associated with

Rating

Integrated circuit package system with downset lead does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit package system with downset lead, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit package system with downset lead will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3992733