Integrated circuit package system including die stacking

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S685000, C257S790000, C257S777000, C257SE25006, C257SE25013, C257SE25018, C257SE25021, C257SE25027, C257SE23085, C257SE21614

Reexamination Certificate

active

11307861

ABSTRACT:
An integrated circuit package system including a leadframe having an aperture provided therein and an integrated circuit package mounted to the leadframe over or under the aperture. A die is mounted within the aperture to the integrated circuit package and the die includes a plurality of the die.

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patent: 6104084 (2000-08-01), Ishio et al.
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patent: 6838754 (2005-01-01), Kim
patent: 6861288 (2005-03-01), Shim et al.
patent: 6879031 (2005-04-01), Wang
patent: 2005/0046003 (2005-03-01), Tsai
patent: 2007/0018290 (2007-01-01), Punzalan et al.

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