Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Patent
1998-03-06
2000-12-12
Smith, Matthew
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
438111, 438123, 438125, H01L 2160, H05K 334
Patent
active
061597651
ABSTRACT:
An integrated circuit package that has the ability for interdevice communication. The integrated circuit package has a first device mounted within the integrated circuit package. A second device is also mounted within the integrated circuit package. The second device is directly coupled to the first device through interdevice bonding for allowing the first device and the second device to communicate and control one another.
REFERENCES:
patent: 5084753 (1992-01-01), Golda et al.
patent: 5113580 (1992-05-01), Schroeder et al.
patent: 5289043 (1994-02-01), Marshall et al.
patent: 5783463 (1998-07-01), Takehashi
patent: 5789816 (1998-08-01), Wu
patent: 6080931 (2000-06-01), Park et al.
PCT International Search Report dated Jun. 15, 1999.
Charles Mike
Drehobl Steve V.
Fernandez Joseph D.
Anya Igwe U.
Microchip Technology Incorporated
Smith Matthew
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