Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1998-07-15
2001-03-20
Potter, Roy (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257S737000
Reexamination Certificate
active
06204163
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to an integrated circuit package for flip chips, and more particularly, to an integrated circuit package that aligns a flip chip and a method of forming same.
BACKGROUND OF THE INVENTION
Large scale integrated circuit chips have many input and output connections. In order to accommodate the many connections, manufacturers have produced leadless chip carriers that use a wire bonding process. However, a wire bonding process can be expensive. In order to reduce the complexity and expense of a wire bonding process, manufacturers have increasingly used flip chip technology.
In a flip chip, an integrated circuit carries a pad arrangement on the top surface and is turned upside down (i.e., flipped), thus allowing direct coupling between the pads and matching contacts on the main circuit board or chip carrier. In many typical flip chip circuits, solder or gold bumps are formed on the integrated circuit input/output terminals. The flip chip is directly bonded to a chip carrier or other structure by a solder connection. The input/output pattern that has the soldered or other formed conductive bumps is known as the chip footprint, and is typically designed from the particular design criteria used by one skilled in the art for creating the chip surface connection on the chip itself.
Typically, the flip chip is placed onto a substrate using expensive “pick-in-place” techniques, such as by using a flip chip die bonder. The flip chips are expensive and often the conductive bumps formed at the appropriate input/output contacts are very small and require expensive and complex placement techniques. Additionally, even after the flip chip is placed in its proper position, and the conductive bumps formed as solder or gold/epoxy are in their proper position, the flip chip typically forms a permanent bond with the substrate, making subsequent flip chip removal difficult. This permanent bond is sometimes the result of an underfill that fills the space under the flip chip. The permanent bond could also be the result of solder forming the conductive bumps engaging the substrate. However, often, the flip chip has to be readily removed for replacement with upgrades and/or replacement chips, especially if the original flip chip has become damaged. Even if the flip chip could be readily removed, expensive placement techniques would have to be used.
Some prior art techniques provide alignment features for various flip chip circuits. However, some of these techniques are expensive, complicated, or still require complicated placement techniques. Some of the techniques also make permanent or semi-permanent attachments that make flip chip removal difficult. Examples of such placement and flip chip mounting techniques include EP Patent No. 186,818, which discloses an insulator having holes arranged in a pattern corresponding to that of the contacts, which is placed between a chip and leads for easy alignment. Other U.S. Patents disclose various interposers or spacers for aligning chips such as disclosed in U.S. Pat. Nos. 5,111,279; 5,168,346; 5,347,162; 5,468,681; and 5,489,804, all to Pasch or Pasch, et al.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide an integrated circuit package and method of forming same that allows flip chip packaging where the flip chip can be readily aligned with the circuitry pattern on a substrate without using expensive “pick-in-place” techniques or flip chip die bonders.
It is still another object of the present invention to provide an integrated circuit package for flip chips where the flip chip can be secured in place for allowing contact between the conductive bumps on a flip chip and the circuitry pattern on a substrate, but also allow ready removal of the flip chip.
It is still another object of the present invention to provide an integrated circuit package for flip chips, where the flip chip can be secured for ready removal without requiring a permanently bonding underfill.
The present invention now provides an integrated circuit package that allows a flip chip having input/output contacts formed as conductive bumps to be aligned accurately such that the conductive bumps engage the circuitry pattern in the desired configuration. The present invention also allows the flip chip to be secured such that the conductive bumps remain in contact with the circuitry pattern. The flip chip is readily placed in its proper position by means of a thermoplastic attachment film positioned on the substrate and having vias that expose the circuitry pattern. The thermoplastic attachment film forms a socket-type arrangement where the conductive bumps are received within the vias formed in the thermoplastic attachment film. The attachment film also provides a thermoplastic bond between the flip chip and the substrate which, upon heating thereof, allows the flip chip to be removed.
In accordance with the present invention, the integrated circuit package comprises a substrate with a circuitry pattern formed on the substrate. A thermoplastic attachment film is positioned on the substrate and has vias that expose the circuitry pattern. A flip chip has input/output contacts formed as conductive bumps and mounted on the thermoplastic attachment film, such that the conductive bumps are received within the cut openings and engage the circuitry pattern. Upon heating of a thermoplastic attachment film, a thermoplastic bond is formed between the substrate and the flip chip. Upon application of heat to the integrated circuit package, the flip chip can be removed.
In accordance with one aspect of the present invention, the circuitry pattern comprises bond pads for engaging the conductive bumps on the flip chip. The thermoplastic attachment film exposes the bond pads. The vias are formed as cut openings, such as by laser drilling the vias to the proper dimension for receiving the conductive bumps. In still another aspect of the present invention, the conductive bumps can be formed of gold or an epoxy that has been impregnated with a conductive material. The conductive bumps can also be formed from a thermoplastic resin or a thermoplastic paste that could be screen-printed onto the flip chip at the input/output contacts. When the conductive bumps are formed from such a thermoplastic paste or resin, the thermoplastic is typically impregnated with a silver or other conductive material to allow the thermoplastic to conduct current as necessary for the structure.
The thermoplastic also aids in forming a bond between the flip chip and the circuit pattern and/or the bond pads. This structure creates an even greater bond that is rigid under stress conditions. The thermoplastic bond with the attachment film and the conductive thermoplastic bumps is broken upon application of heat to a temperature sufficient for making the thermoplastic attachment film and conductive thermoplastic bumps pliable enough to allow flip chip removal.
In still another aspect of the present invention, the thermoplastic attachment film is typically about two mils thick, and the conductive bumps are about three mils thick to allow some compression of the conductive bumps to aid in securing the flip chip, thermoplastic attachment film and substrate together. The substrate can be formed from a six ohm substrate or initially formed from a green tape ceramic substrate.
In accordance with a method aspect of the present invention, the method for forming an integrated circuit package of the present invention comprises the steps of forming a substrate having a circuitry pattern thereon. A thermoplastic attachment film is positioned on the substrate. The attachment film has been precut to fit over the substrate and, typically, the vias have been cut by means such as a laser, a drill or other means known to those skilled in the art. The vias expose the circuitry pattern formed on the substrate.
The method further comprises the step of mounting a flip chip on the thermoplastic attachment film, wherein the flip chip includes input/output contacts formed as conductive bum
Newton Charles M.
Panchou Karen A.
Rosier Charles D.
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Harris Corporation
Potter Roy
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