Integrated circuit metallization with zero contact enclosure req

Fishing – trapping – and vermin destroying

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437194, 437195, H01L 2144

Patent

active

052702545

ABSTRACT:
A method for forming aluminum metallization for contacting a conductive element in an integrated circuit, and an integrated circuit formed according to the same, is disclosed. According to a first disclosed embodiment, a first aluminum alloy layer is formed within the contact, optionally with a barrier layer between it and the underlying electrode. An etch stop layer is formed thereover, of a material which has a low etch rate to an aluminum etchant species. A second, thicker, aluminum alloy layer is formed thereover. The second aluminum layer is etched until the etch stop layer is reached; the mask for defining the metal line may have an edge within the dimensions of the contact opening. After removal of the exposed etch stop layer, a timed etch removes the first aluminum alloy layer, without exposing the bottom of the contact. The metal line may thus be safely formed, without requiring an enclosure around the contact opening. According to an alternate embodiment, conductive or semiconductive sidewall spacers may be formed, upon which the metal etch can stop, leaving a metal line within the contact dimensions. A further alternative embodiment uses a conductive etch stop layer which covers the entire contact, and upon which the metal etch can stop within the contact opening.

REFERENCES:
patent: 3801880 (1974-04-01), Harada et al.
patent: 4454166 (1984-06-01), Abe et al.
patent: 4656732 (1987-04-01), Teng et al.
patent: 4677739 (1987-07-01), Doering et al.
patent: 4720908 (1988-01-01), Wills
patent: 4837183 (1989-06-01), Polito et al.
patent: 4924295 (1990-05-01), Kuecher
patent: 4960732 (1990-10-01), Dixit et al.
patent: 4994410 (1991-02-01), Sun et al.
patent: 5094979 (1992-03-01), Kusano
patent: 5106781 (1992-04-01), Penning De Vries
Chen, et al., "Planarized Aluminum Metallization for Sub-0.5 .mu.m CMOS Technology", IEDM Digest of Technical Papers, paper 3.4.1 (IEEE, Dec. 1990), pp. 51-54.
Lee, et al., "A Selective CVD Tungsten Local Interconnect Technology", IEDM Digest of Technical Papers, (IEEE, Dec. 1988), pp. 450-453.
Ono, et al., "Development of a Planarized Al-Si Contact Filling Technology", VMIC Conference (IEEE, Jun. 12-13, 1990), pp. 76-81.
Inoue, et al., "The properties of aluminum thin films sputter deposited at elevated temperatures", J. Vac. Sci. Technol., A 6(3) (American Vacuum Society, 1988), pp. 1636-1639.

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