Integrated circuit memory devices with improved twisted bit-line

Details Integrated circuit memory devices with improved twisted bit-line Integrated circuit memory devices with improved twisted bit-line

1999-04-22

2000-10-31

Clark, Sheila V.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

257776, 365 69, H01L 2348, H01L 2352, H01L 2940

Patent

active

061407046

ABSTRACT:
An integrated circuit memory device includes a memory cell array and first and second sense amplifiers positioned on respective opposite first and second sides of the memory cell array. A first bit line pair and a second bit line pair connect the memory cell array to the first and second sense amplifiers, respectively. A first bit line of the first bit line pair and a first bit line of the second bit line pair extend across the memory cell array from the first side to the second side without crossing one another. A second bit line of the second bit line pair extends across the memory cell array from the first side to the second side, crossing the first bit line of the first bit line pair and the first bit line of the second bit line pair.

REFERENCES:
patent: 4922459 (1990-05-01), Hidaka
patent: 5062077 (1991-10-01), Takashima et al.
patent: 5144583 (1992-09-01), Oowaki et al.
patent: 5305252 (1994-04-01), Saeki
patent: 5475643 (1995-12-01), Ohta
patent: 5602773 (1997-02-01), Campbell
patent: 5610871 (1997-03-01), Hidaka
patent: 5625234 (1997-04-01), Suzzuki et al.
patent: 5949698 (1999-02-01), Shirley

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