Integrated circuit memory devices including active load...

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

Reexamination Certificate

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C365S190000, C365S203000

Reexamination Certificate

active

06879533

ABSTRACT:
An integrated circuit memory device can include a memory cell array having a plurality of memory cells, and a bit line sense amplifier configured to amplify data on a pair of bit lines from a memory cell of the memory cell array and to provide the amplified data on a data line and a complementary data line. An active load circuit includes a first load device electrically connected between the data line and a voltage source wherein an electrical resistance of the first load device is varied responsive to a voltage level of the data line. The active load circuit also includes a second load device electrically connected between the complementary data line and the voltage source wherein an electrical resistance of the second load device is varied responsive to a voltage level of the complementary data line. Related methods are also discussed.

REFERENCES:
patent: 6452851 (2002-09-01), Endo et al.

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