Integrated circuit memory devices having sense amplifier driver

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

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365207, 365149, G11C 700

Patent

active

061544043

ABSTRACT:
Integrated circuit memory devices include a sense amplifier which is electrically coupled to a first pair of bit lines (BL and /BL) and is responsive to at least one amplifier enable signal (e.g., AE1, AE2). A preferred driver circuit is also provided. The driver circuit is responsive to a write enable pulse (.phi.WR) and drives the at least one amplifier enable signal to an inactive state (e.g., high impedance state) in response to a leading edge of the write enable pulse and to an active state (Vss or Vcc) in response to a trailing edge of the write enable pulse. The memory device also includes a write enable buffer that generates a write enable pulse in response to a write enable signal. By disposing the sense amplifier in an inactive state early in response to a leading edge of the write enable pulse, improved writing efficiency can be achieved.

REFERENCES:
patent: 4802129 (1989-01-01), Hoekstra et al.
patent: 5548560 (1996-08-01), Stephens, Jr. et al.
patent: 5555210 (1996-09-01), Kato
patent: 5787042 (1998-07-01), Morgan

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