Integrated circuit memory devices having independently biased su

Details Integrated circuit memory devices having independently biased su Integrated circuit memory devices having independently biased su

1998-10-27

2000-02-15

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257299, 257371, 257901, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

060256214

ABSTRACT:
Integrated circuit memory devices include a semiconductor substrate of first conductivity type (e.g., P-type), a first well region of second conductivity type (e.g., N-type) in the substrate and first and second nonoverlapping sub-well regions of first conductivity type in the first well region. To improve the electrical characteristics of circuits within the memory device, a first semiconductor device is provided in the first sub-well region (which is biased at a back-bias potential (Vbb)) and a second semiconductor device is provided in the second sub-well region (which is biased at a ground or negative supply potential (Vss)). The first semiconductor device is preferably selected from the group consisting of memory cell access transistors, equalization circuits and isolation gates. The second semiconductor device is also preferably selected from the group consisting of column select circuits and sense amplifiers.

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patent: 5894145 (1999-04-01), Chen et al.

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