Integrated circuit memory devices having hierarchical bit...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S188000, C365S189110, C365S190000

Reexamination Certificate

active

07151696

ABSTRACT:
Integrated circuit memory devices include a first column of memory cells electrically coupled to a first pair of bit lines and a bit line precharge and selection circuit. This bit line precharge and selection circuit includes at least one stacked arrangement of thin-film transistors. These thin-film transistors include a first PMOS thin-film pull-up transistor and a first NMOS thin-film pass transistor. These thin-film transistors are electrically coupled to one of the first pair of bit lines. The first column of memory cells includes a column of TFT SRAM cells.

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