Integrated circuit memory devices having direct access mode test

Details Integrated circuit memory devices having direct access mode test Integrated circuit memory devices having direct access mode test

1998-11-24

2000-04-04

Nelms, David

Static information storage and retrieval

Read/write circuit

Testing

36518905, 36523008, G11C 700

Patent

active

060469471

ABSTRACT:
Integrated circuit memory devices include test mode control circuits to more efficiently route test data to a fewer number of output pins during test mode operation. The memory device may include first and second memory arrays having first and second pluralities of data lines electrically coupled thereto, respectively. First and second pluralities of latch units are also provided. The first plurality of latch units are electrically coupled together in series as a first pipelined latch unit and electrically coupled in parallel to the first memory array by the first plurality of data lines. The second plurality of latch units are electrically coupled together in series as a second pipelined latch unit and electrically coupled in parallel to the second memory array by the second plurality of data lines. A preferred test mode control circuit electrically couples an output of the first pipelined latch unit to an input of the second pipelined latch unit, in response to a test mode control signal (.phi.DAE). This test mode control circuit enables the transfer of data from the first pipelined latch unit to the second pipelined latch unit during direct access test mode reading operations. This data can then be transferred from the first pipelined latch unit to an output driver and then serially transmitted to a single input/output pin. Additional memory arrays within the memory device may also be linked together during test mode operation to improve testing efficiency when multiple memory devices are tested simultaneously in a memory testing apparatus.

REFERENCES:
patent: 5416741 (1995-05-01), Ohsawa
patent: 5469445 (1995-11-01), Nicolaidis
patent: 5506499 (1996-04-01), Puar
patent: 5574692 (1996-11-01), Dierke
patent: 5642057 (1997-06-01), Oke et al.
patent: 5668815 (1997-09-01), Gittinger et al.
patent: 5708614 (1998-01-01), Koshikawa
patent: 5877987 (1999-03-01), Merritt
European Search Report, EP 98 30 3712, Sep. 28, 1998.

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