Integrated circuit memory device supporting an N bit...

Details Integrated circuit memory device supporting an N bit... Integrated circuit memory device supporting an N bit...

2006-03-21

2006-03-21

Anderson, Matthew D. (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S157000, C711S168000, C711S213000, C711S218000

Reexamination Certificate

active

07017010

ABSTRACT:
The present invention provides a dual data rate (DDR) integrated circuit memory device that is configured to support an N to 2N prefetch-to-burst length mode of operation. The DDR integrated circuit memory device is further configured to support a sequential address increase scheme and an interleave address increase scheme.

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patent: 6191997 (2001-02-01), Son et al.
patent: 6708264 (2004-03-01), Abe et al.
patent: 6795899 (2004-09-01), Dodd et al.
patent: 2002/0108013 (2002-08-01), Coteus et al.
patent: 0167629 (1999-01-01), None
Ryan, Kevin. “DDR SDRAM Functionality and Controller Read Data Capture,”DesignLine, Micron Technology, Inc. vol. 8, Issue 3, 1999.

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