Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-06-29
2010-12-28
Graybill, David E (Department: 2894)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S700000, C438S682000
Reexamination Certificate
active
07858514
ABSTRACT:
In a method of fabricating a semiconductor structure, a carbon containing mask is fabricated over a dielectric layer. The mask exposes the surface of the dielectric layer at least partly in a region between two adjacent conducting lines. A contact hole is etched into the dielectric layer in the region between the two adjacent conducting lines.
REFERENCES:
patent: 5121184 (1992-06-01), Huang et al.
patent: 5883575 (1999-03-01), Ruby et al.
patent: 5889389 (1999-03-01), Bothra et al.
patent: 6127811 (2000-10-01), Shenoy et al.
patent: 6146543 (2000-11-01), Tai et al.
patent: 6197644 (2001-03-01), Gardner et al.
patent: 6271087 (2001-08-01), Kinoshita et al.
patent: 6378996 (2002-04-01), Shimada et al.
patent: 6573030 (2003-06-01), Fairbairn et al.
patent: 6750127 (2004-06-01), Chang et al.
patent: 6841341 (2005-01-01), Fairbairn et al.
patent: 6900002 (2005-05-01), Plat et al.
patent: 6913958 (2005-07-01), Plat et al.
patent: 6989332 (2006-01-01), Bell et al.
patent: 7033960 (2006-04-01), You et al.
patent: 7084071 (2006-08-01), Dakshina-Murthy et al.
patent: 7109101 (2006-09-01), Wright et al.
patent: 7575990 (2009-08-01), Wei
patent: 2002/0096738 (2002-07-01), Prinslow et al.
patent: 2002/0111025 (2002-08-01), Weybright et al.
patent: 2003/0021004 (2003-01-01), Cunningham et al.
patent: 2003/0024902 (2003-02-01), Li et al.
patent: 2003/0045114 (2003-03-01), Ni et al.
patent: 2003/0119307 (2003-06-01), Bekiaris et al.
patent: 2004/0038537 (2004-02-01), Liu et al.
patent: 2004/0061227 (2004-04-01), Gao et al.
patent: 2004/0259355 (2004-12-01), Yin et al.
patent: 2005/0009268 (2005-01-01), Cheng et al.
patent: 2005/0048222 (2005-03-01), Ruelke et al.
patent: 2005/0136675 (2005-06-01), Sandhu et al.
patent: 2005/0164479 (2005-07-01), Perng et al.
patent: 2005/0167394 (2005-08-01), Liu et al.
patent: 2005/0167839 (2005-08-01), Wetzel et al.
patent: 2005/0239002 (2005-10-01), Li
patent: 2006/0011583 (2006-01-01), Bailey et al.
patent: 2006/0024945 (2006-02-01), Kim et al.
patent: 2006/0105578 (2006-05-01), Hong et al.
patent: 2006/0205207 (2006-09-01), Chen et al.
patent: 2006/0289385 (2006-12-01), Kikuchi
patent: 2007/0210339 (2007-09-01), Narasimhan et al.
patent: 2008/0044980 (2008-02-01), Wilson et al.
patent: 2008/0061340 (2008-03-01), Heineck et al.
patent: 2008/0076230 (2008-03-01), Cheng et al.
patent: 2009/0001595 (2009-01-01), Roessner et al.
patent: 2010/0032805 (2010-02-01), Letertre et al.
patent: 1 154 468 (2001-11-01), None
patent: 2005-045053 (2005-02-01), None
patent: WO 0245134 (2002-06-01), None
Juergensen Ilona
Koehler Daniel
Roessner Ulrike
Vogt Mirko
Graybill David E
Qimonda AG
LandOfFree
Integrated circuit, intermediate structure and a method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuit, intermediate structure and a method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit, intermediate structure and a method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4194060