Integrated circuit insulator and method

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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C438S778000, C438S763000

Reexamination Certificate

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06962883

ABSTRACT:
A two-stage plasma enhance dielectric deposition with a first stage of low capacitively-coupled RF bias with conformal deposition (202) followed by high capacitively-coupled RF bias for planarizing deposition (204) limits the charge build up on the underlying structure (104, 106, 108).

REFERENCES:
patent: 5432073 (1995-07-01), Wu et al.
patent: 5705405 (1998-01-01), Cunningham
patent: 5707486 (1998-01-01), Collins
patent: 5888414 (1999-03-01), Collins et al.

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