Integrated circuit I/O interface that uses excess data I/O pin b

Details Integrated circuit I/O interface that uses excess data I/O pin b Integrated circuit I/O interface that uses excess data I/O pin b

1996-09-18

2000-02-29

Maung, Zarni

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518901, 710 71, G11C 1900, G06F 1300

Patent

active

060317671

ABSTRACT:
An I/O interface for an integrated circuit (IC) is described that has a reduced number of I/O pins dedicated to providing control signals to or status information from the IC. In one embodiment, the IC comprises a plurality of input pins connected to logic for receiving and processing input data. The input pins have an input bandwidth greater than the logic's processing rate. If data and control signals are multiplexed onto the same input pin, the excess input pin bandwidth may used to transfer control signals into a plurality of latches within the IC. The I/O interface outputs a select signal that designates when an external device should drive the input pins with either data or control signals. In a specific embodiment, the logic comprises a parallel to serial converter and the control signal select conversion speed or encoding options. In another embodiment, the IC comprises a plurality of output pins connected to the output of a selector. Status latches and logic for outputting processed data drive the selector's inputs. The IC outputs a select signal that allows an external device to determine when the output pins are carrying processed data versus status information and thus demultiplex the signals. In a specific embodiment, the logic is a serial to parallel converter. Finally, both the input and output pin embodiments may used together in a single IC.

REFERENCES:
patent: 4573758 (1986-03-01), Hecker et al.
patent: 4589085 (1986-05-01), Pierce
patent: 4656620 (1987-04-01), Cox
patent: 4893309 (1990-01-01), Lechner et al.
patent: 5249160 (1993-09-01), Wu et al.
patent: 5303201 (1994-04-01), Sakamoto
patent: 5473758 (1995-12-01), Allen et al.
patent: 5530965 (1996-06-01), Kawasaki et al.
patent: 5590078 (1996-12-01), Chatter
patent: 5680567 (1997-10-01), Dent
patent: 5717695 (1998-02-01), Manela et al.
patent: 5721708 (1998-02-01), Tsai et al.
patent: 5808957 (1998-09-01), Lee et al.
patent: 5822776 (1998-10-01), De Korte et al.
"Microsoft Press Computer Dictionary," 2nd ed., Microsoft Press, pp. 12-13, 95-96, 110, 1994.

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