Integrated circuit having unique lead configuration

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds

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Details

257692, 257773, H01L 2348, H01L 2352

Patent

active

060491361

ABSTRACT:
The present invention is generally directed to a an integrated circuit package having a unique lead configuration, wherein the integrated circuit package is constructed from a die containing an integrated circuit. The die has a plurality of leads for carrying electrical signals to and from the integrated circuit, wherein the plurality of leads are disposed over a bottom side of the die. The package further includes a multi-layer substrate having at least two signal layers. The substrate is juxtaposed against the die and has a plurality of contacts disposed along a top side to align with the leads of the die to carry the electrical signals to conductive paths within the at least two signal layers. The multi-layer substrate has a larger adjoining surface area than the die and further has a plurality of leads disposed across a bottom side for connection with a printed circuit board, the on the bottom side being in communication with the leads of the top side by way of the conductive paths disposed within the substrate. The leads of the die are disposed such that at least two high speed rows of leads are disposed in parallel fashion near the center of the die, wherein the high speed rows are for carrying high frequency electrical signals. At least two sets of low speed rows of leads are disposed in parallel fashion near the sides of the die, and spaced apart from the high speed rows.

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