Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-11-20
2003-01-28
Nguyen, Chong Quang (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
Reexamination Certificate
active
06512256
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to an integrated circuit having a hydrogen barrier layer to protect circuit elements containing ferroelectric or high-dielectric constant metal oxide materials, and to a method for fabricating such a circuit.
2. Statement of the Problem
Ferroelectric compounds possess favorable characteristics for use in nonvolatile integrated circuit memories. See Miller, U.S. Pat. No. 5,046,043. A ferroelectric device, such as a capacitor, is useful as a nonvolatile memory when it possesses desired electronic characteristics, such as high residual polarization, good coercive field, high fatigue resistance, and low leakage current. Lead-containing ABO
3
type ferroelectric oxides such as PZT (lead titanate zirconate) and PLZT (lanthanum lead titanate zirconate) have been studied for practical use in integrated circuits. Layered superlattice material oxides have also been studied for use in integrated circuits. See Watanabe, U.S. Pat. No. 5,434,102. Layered superlattice materials exhibit characteristics in ferroelectric memories that are orders of magnitude superior to those of PZT and PLZT compounds. Integrated circuit devices containing ferroelectric elements are currently being manufactured. Nevertheless, the persistent problem of hydrogen degradation during the manufacturing process hinders the economical production in commercial quantities of ferroelectric memories and other IC devices using the layered superlattice material compounds with the desired electronic characteristics.
A typical ferroelectric memory device in an integrated circuit contains a semiconductor substrate and a metal-oxide semiconductor field-effect transistor (MOSFET) in electrical contact with a ferroelectric device, usually a ferroelectric capacitor. A ferroelectric capacitor typically contains a ferroelectric thin film located between a first, bottom electrode and a second, top electrode, the electrodes typically containing platinum. During manufacture of the circuit, the MOSFET is subjected to conditions causing defects in the silicon substrate. For example, the CMOS/MOSFET manufacturing process usually includes high energy steps, such as ion-mill etching and plasma etching. Defects also arise during heat treatment for crystallization of the ferroelectric thin film at relatively high temperatures, often in the range 500°-900° C. As a result, numerous defects are generated in the single crystal structure of the semiconductor silicon substrate, leading to deterioration in the electronic characteristics of the MOSFET.
To restore the silicon properties of the MOSFET/CMOS, the manufacturing process typically includes a hydrogen annealing step, in which defects such as dangling bonds are eliminated by utilizing the reducing property of hydrogen. Various techniques have been developed to effect the hydrogen annealing, such as a forming-gas anneal (“FGA”). Conventionally, FGA treatments are conducted underambient conditions in a H
2
—N
2
gas mixture between 350° and 550° C., typically around 400-450° C., for a time period of about 30 minutes. In addition, the integrated-circuit manufacturing process requires other fabrication steps that expose the integrated circuit to hydrogen, often at elevated temperatures, such as hydrogen-rich plasma CVD processes for depositing metals and dielectrics, growth of silicon dioxide from silane or TEOS sources, and etching processes using hydrogen and hydrogen plasma. During processes that involve hydrogen, the hydrogen diffuses principally through the top electrode to the ferroelectric thin film and reduces the oxides contained in the ferroelectric material. The absorbed hydrogen also metallizes the surface of the ferroelectric thin film by reducing metal oxides. As a result of these effects, the electronic properties of the capacitor are degraded. Also, the adhesivity of the ferroelectric thin film to the upper electrode is lowered by the chemical change taking place at the interface. Alternatively, the upper electrode is pushed up by the oxygen gas, water, and other products of the oxidation-reduction reactions taking place. Thus, peeling is likely to take place at the interface between the top electrode and the ferroelectric thin film. In addition, hydrogen also can reach the. lower electrode, leading to internal stresses that cause the capacitor to peel off its substrate. These problems are acute in ferroelectric memories containing layered superlattice material compounds because these oxide compounds are particularly complex and prone to degradation by hydrogen-reduction. After the forming-gas anneal (FGA), the remnant polarization of the ferroelectrics is very low and no longer suitable for storing information. Also, an increase in leakage currents results.
Several methods have been reported in the art to inhibit or reverse hydrogen degradation desired electronic properties in ferroelectric oxide materials. Oxygen-annealing at high temperature (800° C.) for about one hour results in virtually complete recovery of the ferroelectric properties degraded by hydrogen treatments. But the high-temperature oxygen-anneal itself might generate defects in silicon crystalline structure, thereby offsetting somewhat the positive effects of any prior forming-gas anneal on the CMOS characteristics. Also, a high-temperature oxygen-anneal may only be conducted prior to aluminum metallization. Furthermore, if hydrogen damage has already caused structural damage, such as peeling of the capacitor layers from underlying and overlying layers, then such damage cannot be reversed by an oxygen-recovery anneal.
To reduce the detrimental effects of hydrogen and protect the metal oxide element, the prior art also teaches the application of hydrogen barrier layers to inhibit the diffusion of hydrogen into the ferroelectric or dielectric metal oxide material. The barrier layer is typically applied over the metal oxide element, but it is also sometimes applied below and to the sides of the element. The utilization of hydrogen barrier layers results in added complexity of the manufacturing process, with a corresponding increase in cost. Extra deposition steps are necessary to form the barrier layers on the integrated circuit substrate. The hydrogen barrier layers also require extra patterning steps. If the material used to form the layer is a poor electrical conductor, then it may be necessary to remove it in still other processing steps to avoid interference with electrical signals. Conversely, if the material is conducting, it may lead to shorting of electrical wiring and circuit paths. Furthermore, some well-known compositions of hydrogen barrier layers do not adhere well to metals commonly used in integrated circuits, such as platinum and aluminum.
Hydrogen degradation is also a problem in complex metal oxides used in nonferroelectric, high-dielectric constant applications in integrated circuits. Hydrogen reactions cause structural damage, as described above for ferroelectric oxides, and cause degradation of dielectric properties. Examples of metal oxides subject to hydrogen degradation include barium strontium titanate (“BST”), barium strontium niobate (“BSN”), certain ABO
3
-type perovskites, and certain layered superlattice materials. Hydrogen barrier layers are, therefore, used also to protect nonferroelectric, high-dielectric constant metal oxides.
Thus, it would be useful to have an integrated circuit having a hydrogen barrier layer and a method for making such a circuit that provide the benefits of a hydrogen barrier layer in protecting ferroelectric and nonferroelectric high-dielectric constant metal oxide materials; in particular, ferroelectric layered superlattice materials from hydrogen degradation, while minimizing the complexity of the integrated circuit and its fabrication method.
3. Solution to the Problem
The invention solves the above problems by providing an integrated circuit having a self-aligning hydrogen barrier layer, and a method for fabricating such an integrated circuit. A hydrogen barrier layer according to
Cuchiaro Joseph D.
Furuya Akira
Miyasaka Yoichi
Paz de Araujo Carlos A.
Nguyen Chong Quang
Patton & Boggs LLP
Symetrix Corporation
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