Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-08-05
1998-03-24
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438787, 438791, 438909, H01L 21336, H01L 2131
Patent
active
057312389
ABSTRACT:
An integrated circuit (10) is formed using jet vapor deposition (JVD) silicon nitride. A non-volatile memory device (11) has a tunnel dielectric layer (27) and an inter-poly dielectric layer (31) that can be formed from JVD silicon nitride. A transistor (12,13,40) is formed that has a gate dielectric material made from JVD silicon nitride. In addition, a passivation layer (47) can be formed overlying a semiconductor device (40) that is formed from JVD silicon nitride.
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Cavins Craig Allan
Chang Ko-Min
Tseng Hsing-Huang
Lebentritt Michael S.
Meyer George R.
Motorola Inc.
Niebling John
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