Integrated circuit fabrication method with buried oxide isolatio

Details Integrated circuit fabrication method with buried oxide isolatio Integrated circuit fabrication method with buried oxide isolatio

1996-07-25

1998-08-18

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438199, 438238, 438520, 438526, H01L 2100

Patent

active

057958009

ABSTRACT:
A CMOS SRAM cell in which a patterned SIMOX layer forms a buried oxide beneath the PMOS devices, but not beneath the NMOS devices. Latchup is impossible, and well diffusions are not needed.

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Sano, et al., "High Quality SiO.sub.2 /Si Interfaces of Poly-Crystalline Silicon Thin Film Transitor by Annealing In Wet Atsmophere," 157 IEEE Electron Device Letters, vol. 16, No. 5 (1995).
Herve, et al., "SOI Substrate for Low-Power LSIs," 87 Solid State Technology (1995).

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