Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1996-05-22
1997-08-19
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Bad bit
365 96, 3652257, G11C 700, G11C 1700
Patent
active
056595107
ABSTRACT:
Integrated circuit chips with fuse-based mode selection capability include a first signal generator for storing a first logic state when the fuse is blown, in response to an externally generated input signal, and for generating a first option changing signal based on the stored first logic state. To reduce the susceptibility to noise and inadvertent designation signals, a second signal generator for storing a second logic state when the fuse is blown is also provided and that fuse is blown in response another externally generated input signal. However, rather than blowing the fuses of the first option changing signal generator and the second option changing signal generator by applying external input signals simultaneously, the fuses are blown sequentially by connecting the second option changing signal generator in series with the first option changing signal generator so that the second option changing signal cannot be generated unless the first option changing signal generator has already been generated. To further lessen the likelihood of inadvertently blowing a fuse, thereby causing a reduction in yield of an integrated circuit semiconductor device, the first option changing signal generator is also connected in series with a dummy option changing signal generator. This dummy option changing signal generator is used to prevent the inadvertent generation of the first logic state caused by a blown fuse in the first option changing signal generator. The first and second option changing signals are then provided to a functional circuit to designate an active mode.
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Kwon Kook-Hwan
Park Hee-Choul
Nelms David C.
Phan Trong Quang
Samsung Electronics Co,. Ltd.
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