Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-04-19
2004-06-01
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S532000, C438S278000, C438S193000, C257S392000
Reexamination Certificate
active
06743679
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to integrated circuit devices having high and low voltage components and techniques for fabricating such devices.
There continues to be a demand for more densely populated and faster integrated circuit devices. To meet these demands, the “on-chip” integrated circuit structural elements continue to be miniaturized, often including a proportional reduction in the gate oxide thickness of Insulated Gate Field Effect Transistors (IGFETs). As the gate oxide thickness decreases, a proportional reduction in operating voltage typically results.
However, the continued decrease in gate oxide thickness generally causes a corresponding decrease in dielectric breakdown voltage. As a result, the breakdown voltage of low voltage components may be less than the output voltage of available power supplies or the operating voltage of external circuits intended to interface with the low voltage components. If gate breakdown voltage is exceeded, the resulting damage typically degrades device performance and reliability. To address this limitation, it is often desirable to have intervening high voltage components operating on the same integrated circuit chip as these low voltage components. One proposed scheme to provide high and low voltage components on the same chip involves the fabrication of gate oxides in different thicknesses. Unfortunately, this approach is exceedingly complex, often resulting in higher manufacturing costs and lower device reliability.
Thus, there is a need for improved integrated circuit devices having both high and low voltage components. There is also a demand for better techniques to provide such voltage devices.
SUMMARY OF THE INVENTION
One form of the present invention is an improved integrated circuit device. This device may include high and low voltage components.
An alternative form of the present invention is an integrated circuit that includes a first component with a first member doped to establish a first operating voltage and a second component with a second member doped to establish a second operating voltage. The second member includes at least two dopants to establish a predetermined difference between the first voltage and the second voltage with one of the dopants being of a first conductivity type and another of the dopants being of a second conductivity type opposite the first conductivity type.
Another alternative form of the present invention includes techniques that provide different dopant levels in different regions of an integrated circuit device. These techniques may be applied to provide transistors with different operating voltages. Such techniques may include doping one region of a gate material level differently from another region to correspondingly define transistors operable at different threshold voltages.
In still another alternative form of the present invention, an integrated circuit device is made by forming a gate dielectric layer on a substrate and establishing a gate material layer on the dielectric layer. A first region of the gate material layer is doped to a first nonzero level and a second region of the gate material layer is doped to a second nonzero level greater than the first level. A first field effect transistor is defined having a first gate formed from the first region and a second field effect transistor is defined having a second gate formed from the second region. The first transistor is operable at a gate threshold greater than the second transistor in accordance with a difference between the first level and the second level.
In a further alternative form, a method of manufacturing an integrated circuit device includes providing a substrate with a first transistor gate and a second transistor gate therealong. The second transistor gate includes a member doped with a dopant of a first conductivity type. The first member and the second member are doped with a dopant of a second conductivity type opposite the first type. This doping provides the first member with a different doping level than the second member, which corresponds to a different threshold voltage for the first gate relative to the second gate.
Other alternative forms of the present invention include, but are not limited to, providing an integrated circuit substrate with a gate dielectric layer positioned on the substrate and a gate material layer positioned on the dielectric layer; where the gate material layer includes polysilicon. A dopant of a first conductivity type is provided in a selected region of the gate material layer. This form also includes patterning the gate dielectric layer and the gate material layer after providing the first conductivity type of dopant to form a number of field effect transistor gates. A first one of the gates is formed from the selected region. The gates and the substrate are doped with a dopant of a second conductivity type opposite the first conductivity type. This doping includes forming a number of doped substrate regions to define a number of transistors corresponding to the gates and establishing a first doping level for the first one of the gates and a second doping level for a second one of the gates. The first doping level corresponds to a first gate threshold voltage and the second doping level corresponds to a second gate threshold voltage different from the first gate threshold voltage.
Further objects, features, benefits, aspects, forms, embodiments, examples, and advantages of the present invention shall become apparent from the detailed drawings and description provided herein.
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Lin Xi-Wei
Tai Gwo-Chung
Koninklijke Philips Electronics , N.V.
Pham Thanh V
Zawilski Peter
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