Integrated circuit devices including an intaglio pattern

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S306000, C257S310000, C257S311000

Reexamination Certificate

active

07038262

ABSTRACT:
Integrated circuit devices and methods of fabricating the same include an interlayer dielectric formed on an integrated circuit substrate. A plurality of buried contacts are formed in the interlayer dielectric and an oxide layer is formed on the interlayer dielectric. An intaglio pattern is formed in the oxide layer that exposes the plurality of buried contacts and a plurality of lower electrodes are formed within a single opening in the intaglio pattern. The lower electrodes are in electrical contact with corresponding ones of the buried contacts. The lower electrodes may be formed symmetrically in the intaglio pattern and may be semi-cylindrical electrodes. The integrated circuit device may be a ferroelectric memory device and forming a plurality of lower electrodes may include forming a plurality of capacitors.

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Maozzami, R. et al., “Integration of Ferroelectric Capacitor Technology with CMOS”, 1994 Symposium on VLSI Technology Digest of Technical Papers, IEEE, 1994, pp. 55-56, no month cited.
Tatsumi Sumi et al., “FA 16.2: A 256kb Nonvolatile Ferroelectric Memory at 3V and 100ns”, 1994 IEEE International Solid State Circuits Conference, pp. 268-269, Feb. 1994.

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