Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-06-18
2000-09-19
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438261, 438267, H01L 2978
Patent
active
061210870
ABSTRACT:
The switching properties of the disclosed device, low off current and high on current, also allows the device to be employed to replace EEPROM, fuses, anti-fuses or other electrically-alterable non volatile switching devices in programmable logic devices. The disclosed device can be fabricated with low cost methods. The manufacturing methods are compatible with current tools and procedures which allows the device to be added to CMOS circuits to replace masked ROM with more flexible flash memory at a modest increase in cost. The cell operational method and manufacturing methods allows the size of the memory element to be scaled smaller to maintain a low cost and high performance as the minimum feature size of microelectronic circuits is reduced in the future. The disclosed cell approach also offers simpler programming methods to simplify memory array design, supports higher cell currents for high speed applications, and uses lower cost manufacturing methods than an "ETOX" cell approach. Furthermore, a new etching technique is disclosed which can used in the manufacture of the disclosed cell which allows a very thin gap to be etched in a polysilicon layer.
REFERENCES:
patent: 3859222 (1975-01-01), Squillace et al.
patent: 5455792 (1995-10-01), Yi
patent: 5851887 (1998-12-01), Caldwell et al.
Mann Richard A.
Worley Eugene R.
Conexant Systems Inc.
Monin, Jr. Donald L.
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