Integrated circuit device gate structures

Details Integrated circuit device gate structures Integrated circuit device gate structures

2011-06-21

2011-06-21

Lebentritt, Michael S (Department: 2829)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S321000, C257S322000, C257S404000, C257SE21203, C257SE21209, C257SE21234, C257SE21583, C257SE29301, C257SE29305, C257SE29307

Reexamination Certificate

active

07964907

ABSTRACT:
Methods of forming a gate structure for an integrated circuit memory device include forming a first dielectric layer having a dielectric constant of under 7 on an integrated circuit substrate. Ions of a selected element from group 4 of the periodic table and having a thermal diffusivity of less than about 0.5 centimeters per second (cm2/s) are injected into the first dielectric layer to form a charge storing region in the first dielectric layer with a tunnel dielectric layer under the charge storing region. A metal oxide second dielectric layer is formed on the first dielectric layer, the second dielectric layer. The substrate including the first and second dielectric layers is thermally treated to form a plurality of discrete charge storing nano crystals in the charge storing region and a gate electrode layer is formed on the second dielectric layer. Gate structures for integrated circuit devices and memory cells are also provided.

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