Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2005-03-15
2005-03-15
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S189080
Reexamination Certificate
active
06868017
ABSTRACT:
In an integrated circuit device that includes a first memory that is capable of inputting data into and/or outputting data from a second memory and a processing unit in which at least part of at least one data flow is changeable, the processing unit includes, in addition to a data processing section that processes data that is inputted from and/or outputted to the first memory, a first address outputting section that outputs a first address of data that is inputted and/or outputted between the first memory and the data processing section and a second address outputting section that outputs a second address of data that is inputted and/or outputted between the first memory and the second memory. By using part of the processing unit, where a data flow can be changed or reconfigured, for configuring a circuit that controls the memories, a cache memory system that is optimal for the processing executed by the integrated circuit device can be configured in the integrated circuit device.
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IP Flex Inc.
Phung Anh
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