Integrated circuit clock input buffer

Details Integrated circuit clock input buffer Integrated circuit clock input buffer

1997-04-03

1998-09-22

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518908, 365233, 326 93, 326 98, G11C 700

Patent

active

058124624

ABSTRACT:
An integrated circuit clock buffer is described which includes output circuits for generating internal clock signals in response to an externally provided clock signal. The clock buffer includes a latch circuit having a delayed feedback to provide a pulsed signal in response to a transition in the external clock signal. The output circuits have a trip point which is skewed in one direction to detect a rising transition of the pulsed signal, and are skewed in a second direction to detect a falling transition of the pulsed signal. The buffer generates two non-skewed internal clock signals which have sharp rising and falling transitions.

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