Integrated circuit chip package

Details Integrated circuit chip package Integrated circuit chip package

1997-07-08

1999-08-17

Brown, Peter Toby

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

257778, 257779, 257787, H01L 2302

Patent

active

059397780

ABSTRACT:
A method and resulting integrated circuit package is disclosed for encapsulating integrated circuit chips using transfer molding techniques in a form known as cavity packages. Each chip is positioned within a cavity surrounded by a laminate or printed wiring board which provides an array of contacts. The contacts provide for connections to an external circuit board/card and the contacts are also indirectly connected internally to the chip. The cavity, chip and some of the laminate, contacts and interconnections are on the same side of the carrier. Liquid plastic is forced into the cavity via a runner in a mold through a gate in the bottom of the carrier in order to encapsulate all of these components.

REFERENCES:
patent: 4688152 (1987-08-01), Chia
patent: 4868349 (1989-09-01), Chia
patent: 5182853 (1993-02-01), Kobayashi et al.
patent: 5275546 (1994-01-01), Fierkens
patent: 5326243 (1994-07-01), Fierkens
patent: 5519936 (1996-05-01), Andros et al.
patent: 5616958 (1997-04-01), Laine et al.
patent: 5721450 (1998-02-01), Miles

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