Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-07-11
2002-08-13
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S303000, C257S296000, C257S324000, C257S325000, C257S306000, C438S396000, C438S239000, C438S240000, C438S253000, C438S399000, C438S310000, C438S361000, C438S313000
Reexamination Certificate
active
06433380
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to integrated circuit devices and methods of forming integrated circuit devices, and more particularly to integrated circuit capacitors and methods of forming integrated circuit capacitors.
BACKGROUND OF THE INVENTION
It is generally desirable to make memory cells as small as possible so that more memory cells can be integrated into each chip. Higher capacitance storage capacitors can also provide better definition when reading the memory cell, lower soft error rate, and enable lower voltage operation. Therefore, if memory cells can be made smaller and with higher capacitance, semiconductor memory devices can become more highly integrated.
Capacitors having three-dimensional structures have been proposed in an attempt to increase cell capacitance. These types of capacitors usually have a lower electrode in the shape of a fin, a box, or a cylinder. However, the manufacturing processes for forming capacitors with three-dimensional electrode structures may be complicated and defects may be easily generated during the manufacturing processes. Accordingly, research into the use of high dielectric materials for increasing the capacitance of capacitors is actively being conducted to avoid the need for forming capacitor electrodes having three-dimensional structure. Similarly, the use of thin dielectric materials having stable dielectric characteristics are also being considered.
Unfortunately, high dielectric materials such as tantalum pentoxide (Ta
2
O
5
) have reduced dielectric strength when formed as relatively thin layers. For example, whereas bulk tantalum pentoxide may have a dielectric constant in a range between about 22 and 25, thin tantalum pentoxide layers having thickness in a range between about 50A and 100A may only have dielectric constants at levels of about 5-6 when used as capacitor dielectric material. This reduction may be due to the formation of a thin natural oxide layer at an interface between a capacitor electrode and the tantalum pentoxide layer. This thin natural oxide layer reduces the net dielectric constant of the resulting composite dielectric layer containing both the natural oxide layer and tantalum pentoxide layer. This tantalum pentoxide layers may also have relatively poor leakage current and breakdown characteristics. Conventional techniques for forming integrated circuit capacitors having tantalum oxide dielectric layers are described in an article by K. W. Kwon et al., entitled “Ta
2
O
5
/TiO
2
Composite Films for High Density DRAM Capacitors”, Technical Digest of the 1993 VLSI Technology Symposium” and in U.S. Pat. Nos. 4,734,340, 5,111,355 and 5,142,438.
Notwithstanding these conventional techniques, there continues to be a need for improved methods of forming integrated circuit capacitors having high dielectric strength and reduced leakage current characteristics.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide improved methods of forming integrated circuit capacitors.
It is another object of the present invention to provide methods of forming integrated circuit capacitors having improved dielectric characteristics.
It is still another object of the present invention to provide methods of forming integrated circuit capacitors containing high dielectric strength materials.
These and other objects, advantages and features of the present invention can be provided by methods of forming integrated circuit capacitors (e.g., DRAM capacitors) that include the steps of forming a first capacitor electrode (e.g., polysilicon electrode) on a substrate and then forming a titanium nitride layer on the first capacitor electrode. A tantalum pentoxide dielectric layer is then formed on an upper surface of the titanium nitride layer. A step is then performed to convert the underlying titanium nitride layer into a titanium oxide layer. A second capacitor electrode is then formed on the tantalum pentoxide layer. The step of converting the titanium nitride layer into a titanium oxide layer is preferably performed by annealing the tantalum pentoxide layer in an oxygen ambient at a temperature in a range between about 700° C. and 900° C. This oxygen ambient provides free oxygen to fill vacancies within the tantalum oxide layer and also provides free oxygen which diffuses into the underlying titanium nitride layer.
According to one preferred aspect of the present invention, the step of forming a titanium nitride layer comprises the steps of depositing a layer of titanium metal on the first capacitor electrode and then converting the layer of titanium metal to titanium nitride by annealing the deposited layer of titanium metal in a nitrogen ambient. Alternatively, the step of forming a titanium nitride layer may comprise the step of depositing titanium nitride on the first capacitor electrode using a titanium chloride source gas.
According to another embodiment of the present invention, methods of forming integrated circuit capacitors include the steps of forming a first polysilicon capacitor electrode on a substrate and forming a titanium nitride layer on the first polysilicon capacitor electrode. Thereafter, a portion of the titanium nitride layer is removed to expose a portion of the first polysilicon electrode. As a preferred embodiment in accordance with this invention, the substrate can be annealed in an N
2
ambient.
Thereafter, a tantalum pentoxide layer is formed on the exposed portion of the first polysilicon capacitor electrode, which is followed by annealing step in an oxygen ambient. Then a silicon oxynitride layer is partially formed on a portion of the first polysilicon capacitor electrode. To complete the capacitor structure, a second capacitor electrode is then formed on the tantalum pentoxide layer, opposite the silicon oxynitride layer. This embodiment comprises the steps of forming a first capacitor electrode over a substrate, forming a titanium nitride layer on the first capacitor electrode, and removing a portion of titanium nitride layer to expose the first portion of the first capacitor electrode. Thereafter, the substrate is annealed in a nitrogen ambient, and then a tantalum pentoxide dielectric layer is formed on the remainder of the titanium nitride layer and the exposed first capacitor. Further, the annealing the tantalum pentoxide dielectric layer in an oxygen ambient converts titanium nitride layer into a titanium oxide layer and forms a silicon oxynitride layer on the exposed first capacitor electrode. Finally, a second capacitor electrode is formed on the tantalum pentoxide layer.
Based on this second embodiment, the resulting integrated circuit capacitor may comprise a first capacitor, electrode, a silicon oxynitride layer on a first portion of the first capacitor electrode and a titanium oxide layer on a second portion of the first capacitor electrode. A tantalum pentoxide layer is also provided on the silicon oxynitride layer and on the titanium oxide layer. A second capacitor electrode is also provided on the tantalum pentoxide layer. The second capacitor electrode preferably extends opposite the silicon oxynitride layer and titanium oxide layer. Thus, the resulting integrated circuit capacitor includes a composite dielectric layer. This composite dielectric layer includes silicon oxynitride and titanium oxide (on adjacent portions of a lower capacitor electrode) and an overlying tantalum pentoxide layer which contacts the underlying silicon oxynitride and titanium oxide.
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Keshavan B. V.
Myers Bigel & Sibley & Sajovec
Samsung Electronics Co,. Ltd.
Smith Matthew
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