Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-11-15
2002-10-22
Fahmy, Jr., Wael (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S199000, C438S200000, C438S210000, C438S216000, C438S275000, C257S350000, C257S369000
Reexamination Certificate
active
06468860
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to integrated circuits in general, and in particular to integrated circuits capable of operating at two different power supply voltages. Still more particularly, the present invention relates to an integrated circuit having transistors capable of operating at a high voltage and transistors capable of operating at a low voltage.
2. Description of the Prior Art
With continuous migration of integrated circuits to smaller geometries for higher density and performance, the supply voltage for field effect transistors within an integrated circuit is also being scaled, for example, from a 5.0 V to a 3.3 V, or from a 3.3 V to 2.5 V. Because of the supply voltage transitions, it is inevitable that some components on a circuit board operate at one power supply while others operate at a different power supply. Indeed, some components may have some of their inputs/outputs operating at a first power supply voltage and other inputs/outputs operating at a second power supply voltage. Thus, it is important to be able to manufacture integrated circuits that are capable of operating at two different power supply voltages.
The current approach to manufacturing the above-mentioned integrated circuits is to use a dual gate oxide (DGO) process. However, the DGO process requires a photolithography step to be applied to a gate oxide film, and such photolithography step may cause the gate oxide film to have degraded yield or reliability. Also, the DGO process cannot overcome the problem of increased junction electric fields that is commonly associated with high voltage power supplies; thus, low-voltage devices must be designed with degraded performance in order to prevent reliability problems due to excessive electric fields on high-voltage devices. In light of the shortcomings of the DGO process, it would be desirable to provide an improved process for manufacturing integrated circuits that are capable of operating at two different power supply voltages.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the present invention, an integrated circuit includes high voltage transistors and low voltage transistors. Lightly doped drains are formed in both high voltage transistors and low voltage transistors within the integrated circuit. A thin layer of silicon nitrate film is then deposited on the first and second transistors. Afterwards, a layer of silicon oxide is deposited on the silicon nitride film. After forming oxide spacers on both high voltage transistors and low voltage transistors, the oxide spacers are removed from the low voltage transistors. Finally, diffusion implants are performed on the first and second transistors. As a result, the high voltage transistors possess lightly doped drained junctions.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
REFERENCES:
patent: 5432114 (1995-07-01), O
patent: 5953599 (1999-09-01), El-Diwany
patent: 6071775 (2000-06-01), Choi et al.
patent: 6297112 (2001-10-01), Lin et al.
Maimon Jon
Polavarapu Murty S.
BAE Systems Information and Electronic Systems Integration Inc.
Fahmy Jr. Wael
Lee Hsien Ming
Ng. Antony P.
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