Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-07-12
2011-07-12
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S742000
Reexamination Certificate
active
07979762
ABSTRACT:
In an integrated circuit board, a plurality of integrated circuits to be checked are connected together in a star shape. Operation clock data for JTAG of each integrated circuit and check data for checking each integrated circuit are stored. When an integrated circuit to be checked is specified, operation clock data for JTAG and check data for the specified integrated circuit are determined. With an operation clock for JTAG according to the determined operation clock data for JTAG, the determined check data is input to the specified integrated circuit. Based on the check data and output data output from the integrated circuit to which this check data is input, the integrated circuit board determines a malfunction in the integrated circuit, and then stores the determination result in a storage device.
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Esaka Satoshi
Furuta Masayuki
Kushigemachi Masataka
Britt Cynthia
Fujitsu Limited
Staas & Halsey , LLP
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