Integrated circuit arrangement with capacitor and...

Details Integrated circuit arrangement with capacitor and... Integrated circuit arrangement with capacitor and...

2007-09-27

2010-10-26

Le, Thao (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S251000, C257SE21011, C257SE21654

Reexamination Certificate

active

07820505

ABSTRACT:
An integrated circuit arrangement contains an insulating region, which is part of a planar insulating layer, and a capacitor which contains: near and far electrode regions near and remote from the insulating region and a dielectric region. The capacitor and an active component are on the same side of the insulating layer, and the near electrode region and an active region of the component are planar and parallel to the insulating layer. The near electrode region is monocrystalline and contains multiple webs. Alternately, a FET is present in which: a channel region is the active region, the FET contains a web with opposing control electrodes connected by a connecting region that is isolated from the channel region by a thick insulating region. The thick insulating region is thicker than control electrode insulation regions. The control electrodes contain the same material as the far electrode region.

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Translation of Japanese Office Action, Mailing Date Feb. 24, 2009, pp. 1-7.
International Examination Report from corresponding PCT patent application No. PCT/DE03/03355.
English International Examination Report from corresponding PCT patent application No. PCT/DE03/03355.

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