Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-08-31
2009-11-24
Potter, Roy K (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S276000, C257SE21320
Reexamination Certificate
active
07622354
ABSTRACT:
An integrated circuit including a memory device comprises an array portion comprising memory cells and conductive lines, an upper surface of the conductive lines being disposed beneath a surface of a semiconductor substrate, and a support portion comprising transistors of a first type, the transistors of the first type comprising a first gate electrode including vertical portions that are vertically adjacent to a channel of the transistor of the first type.
REFERENCES:
patent: 6867994 (2005-03-01), Tsukikawa
patent: 7034408 (2006-04-01), Schloesser
patent: 2004/0184298 (2004-09-01), Takahashi et al.
Dreeskornfeld Lars
Hartwich Jessica
Mono Tobias
Scholz Arnd
Slesazeck Stefan
Eschweiler & Associates LLC
Potter Roy K
Qimonda AG
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