Integrated circuit and method for decorrelating an instruction s

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses

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712220, G06F 906

Patent

active

059448334

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relates to an improved integrated circuit and the process for using it. The invention is particularly applicable to microprocessors and microcomputers and also to hardwired logic circuits which require protection.
2. Description of Related Art
It is known that microprocessors and microcomputers sequentially execute successive instructions of a program stored in a memory, in sync with one or more timing signals referenced relative to one of the clock signals supplied to the microprocessor or microcomputer either internally or externally.
Thus, it is possible to correlate the various phases of this program execution with the clock signals, since the execution of each particular instruction breaks down into several steps timed by one or more successive clock pulses. In effect, in the microprocessors of the prior art, the operation is regularly timed by clock signals generally originating from a sequencing circuit which generates the necessary electrical pulses, particularly by phase shifting the signals relative to the reference clock. Moreover, the sequencing of the actions must factor in the times required to access the various registers, memories and internal devices, but also and especially the signal propagation times in the busses and through the various logic circuits. Consequently, the start and end times of each instruction being perfectly known, it is theoretically possible to know which instruction is being executed in the processing unit of the processor at a given moment, since the program that is running is constituted by a predetermined sequence of instructions.
It is possible, for example, to determine the number of clock pulses delivered since the startup of the program or the resetting of the processing unit, or even the time that has elapsed since an event or an external or internal reference signal.
This capability of being able to observe the running of a program in a microprocessor or a microcomputer is a major drawback when the microprocessor or microcomputer is used in high-security applications. In effect, an ill-intentioned individual would thus be able to know the successive states of the processor and use this information to gain knowledge of certain internal output data.
It is possible to imagine, for example, that a given action on an external signal could take place at different instants as a function of the result of a determined security operation, such as the testing of confidential internal information or the decryption of a message, or even the integrity checking of certain information. Depending on the instant in question, this external signal could supply information on the output data or on the confidential content of the information, and in the case of cryptographic calculations, on the secret encryption key used.
Moreover, there are known microprocessors or microcomputers, such as those marketed by the company SGS Thomson under the reference number ST16XY, which comprise a microprocessor incorporating a random number generator, the reading of which makes it possible to obtain a random number used, for example, for the calculation of encryptions and decryptions.


SUMMARY OF THE INVENTION

One of the objects of the invention is to equip the circuit with means for preventing the type of investigation described above, and more generally for preventing observations, whether illicit or not, of the internal behavior of the circuit.
This object is achieved through the fact that the improved integrated circuit has means for decorrelating the running of at least one instruction sequence of a program from the internal or external signals of the circuit.
According to another characteristic, the electrical signals of the circuit are timing, synchronization or status signals.
According to another characteristic, the decorrelation means comprise one or more circuits generating a sequence of clock or timing pulses which are dispatched at random times.
According to another characteristic, the decorrelation me

REFERENCES:
patent: 4125763 (1978-11-01), Drabing et al.
patent: 4827111 (1989-05-01), Kondo
patent: 5249294 (1993-09-01), Griffin, III et al.
patent: 5404402 (1995-04-01), Sprunk
IBM Technical Disclosure Bulletin, vol. 37, No. 5, May 1, 1994, pp. 419-421, XP000453206 "Actively Slowing a CPU in Response to the Detection of a Signature String".
Patent Abstracts of Japan, vol. 016, No. 532 (P-1448) Oct. 30, 1992 & JP 04 199234 A (Nagano Oki Denki KK; Others: 01) Jul. 20, 1992.

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