Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-11-19
2000-11-21
Pham, Long
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438770, 438981, 148DIG43, 148DIG163, H01L 218234
Patent
active
061502200
ABSTRACT:
A dual thickness gate insulation layer, for use with, e.g., a dual gate MOSFET (Metal Oxide Semiconductor Field Effect Transistor), is formed using a more simplified method and improves the reliability. An impurity layer is formed in the semiconductor substrate, and the impurity layer includes a first portion and a second portion. An insulation layer is grown in the semiconductor substrate, and the insulation layer includes a first layer and a second layer which are different from each other in thickness. The present invention simplifies the insulation layer fabricating steps and improves product reliability.
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Cho Nam-Hoon
Huh Yun-Jun
Hyundai Electronics Industries Co,. Ltd.
Pham Long
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