Insulating layer planarizing method for semiconductor device usi

Details Insulating layer planarizing method for semiconductor device usi Insulating layer planarizing method for semiconductor device usi

1995-12-15

1998-07-21

Breneman, R. Bruce

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438624, 438699, H01L 21469

Patent

active

057834849

ABSTRACT:
A structure of an insulating layer in a semiconductor device includes a substrate, at least one inorganic insulating layer pattern formed on the substrate, and an organic insulating layer formed on an upper part of the substrate and the inorganic insulating layer pattern. Also, a method for planarizing the insulating layer includes the steps of forming a substrate, forming a base insulating layer having a step coverage to form an upper region and a lower region on the substrate, forming a first insulating layer on the base insulating layer, selectively etching the first insulating layer to form at least one first insulating layer at a lower region of the base insulating layer, and forming a second insulating layer at the upper part of the first insulating layer including a first insulating layer pattern.

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