Insitu doped metal policide

Details Insitu doped metal policide Insitu doped metal policide

1998-01-21

2000-10-10

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438655, H01L 213205, H01L 214763

Patent

active

061301450

ABSTRACT:
A reduced metal-rich interface between a poly and metal silicide layer is achieved by insitu doping the metal silicide layer.

REFERENCES:
patent: 4443930 (1984-04-01), Hwang et al.
patent: 5428244 (1995-06-01), Segawa et al.
patent: 5756392 (1998-05-01), Lu et al.
patent: 5827762 (1998-10-01), Bashir et al.
patent: 5837601 (1998-11-01), Matsumoto
patent: 5897365 (1999-04-01), Matsubara
"Formation of Low-Resistivity Gate Electrode Suitable for the Future Devices Using Clustered DCS-Wsix Polycide", Byun et al., Extended Abstracts of the 1997 International Conference on Solid State Devices and Materials, Hamamatsu, 1997, pp. 282-283.
IEEE Publication entitled in Situ Deposited Wsix Policide for High Frequency Transistor Gate Structutres by Lu et al.
Patent Abstract of Japan, Publication No. 61251170, dated Aug. 11, 1986.

Affiliated with

Also associated with

Rating

Insitu doped metal policide does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Insitu doped metal policide, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Insitu doped metal policide will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2256205