Insertion of coherence requests for debugging a multiprocessor

Details Insertion of coherence requests for debugging a multiprocessor Insertion of coherence requests for debugging a multiprocessor

2007-06-26

2010-02-23

Verbrugge, Kevin (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S141000

Reexamination Certificate

active

07669012

ABSTRACT:
A method and system are disclosed to insert coherence events in a multiprocessor computer system, and to present those coherence events to the processors of the multiprocessor computer system for analysis and debugging purposes. The coherence events are inserted in the computer system by adding one or more special insert registers. By writing into the insert registers, coherence events are inserted in the multiprocessor system as if they were generated by the normal coherence protocol. Once these coherence events are processed, the processing of coherence events can continue in the normal operation mode.

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