Input signal phase compensation circuit capable of reliably obta

Details Input signal phase compensation circuit capable of reliably obta Input signal phase compensation circuit capable of reliably obta

1997-10-08

1999-11-16

Butler, Dennis M

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

Using delay

713503, G06F 104

Patent

active

059876190

ABSTRACT:
An input signal phase compensation circuit having a monitor mode and a normal operation mode includes a mode switching circuit, a logic gate receiving an internal data signal, a delay circuit connected to the logic gate, and a phase comparator comparing, in the monitor mode, phases of a signal output from the delay circuit and a clock signal, and determining time for delaying an internal clock signal in a variable delay circuit so as to match phases of the both signals. In the normal operation mode, the time is fixed, and data is obtained at phase compensated timing.

REFERENCES:
patent: 5374860 (1994-12-01), Llewellyn
patent: 5621774 (1997-04-01), Ishibashi et al.
patent: 5774001 (1998-06-01), Mozdzen et al.
"Technical Report of the Electrical Society" Sep. 18, 1995, pp. 40-46.

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